Differential voltage measuring circuit

ABSTRACT

Apparatus for measuring the difference between two voltages in which a first current proportional to the voltage difference is generated at a first point, and there is circuitry for delivering at a second point a second current that is based on the first current and is indicative of the voltage difference; the circuitry includes an uninterrupted current path from the first point to the second point and the current path has a circuit element across which at least a portion of the common mode voltage appears; and the circuit element provides an output current to the path which is independent of the voltage across the circuit element.

BACKGROUND OF THE INVENTION

This invention relates to measuring electrical currents.

A current is typically measured by passing it through a known resistanceand measuring the resulting voltage difference between the two ends ofthe resistance. The ability of the measuring circuit to accuratelyrespond to the differential voltage while ignoring the common modevoltage (the average of the voltages at the two points, which may bemany times larger than the differential voltage) is called the commonmode rejection.

A typical measuring circuit receives as inputs the voltages at the twomeasuring points and delivers as its output a single voltage (referencedto a ground) that is an amplified version of the differential voltagewith the common mode voltage component eliminated.

In instrumentation amplifier type measuring circuits, each of the inputvoltages is amplified separately and the amplified versions are thensubtracted from one another both to eliminate the common mode voltageand to derive an amplified version of the differential voltage.

Isolation amplifier type measuring circuits have an inductive, optical,or capacitive barrier. Only the differential voltage can cross thebarrier and appear at the output. The common mode voltage appearsbetween the lower one of the input voltage and the ground reference ofthe output voltage. The differential voltage is passed across thebarrier by causing a voltage or current on the output side of thebarrier to track exactly a voltage or current on the input side which isarranged to be representative of the differential voltage of interest.

SUMMARY OF THE INVENTION

A general feature of the invention is apparatus for measuring thedifference between two voltages in which a first current proportional tothe voltage difference is generated at a first point, and there iscircuitry for delivering at a second point a second current that isbased on the first current and is indicative of the voltage difference;the circuitry includes an uninterrupted current path from the firstpoint to the second point and the current path has a circuit elementacross which at least a portion of the common mode voltage appears; andthe circuit element delivers an output current on the path which isindependent of the voltage across the circuit element.

Preferred embodiments of the invention include the following features.The first current is generated using an operational amplifier in afeedback mode and the operational amplifier is powered in a zero commonmode configuration relative to one of the two voltages. The circuitelement is a high voltage MOSFET transistor with its source and drainconnected respectively to the first and second points to produce anoffset current at the first point and a lead of the current element isalso connected to the first point. The current source includes a secondcircuit element that is connected at the first point and has an outputcurrent independent of the voltage across the second circuit element,and wherein at least a portion of the common mode voltage is caused toappear across the second element. A current mirror is connected to thesecond point to provide at a third point a current identical to thesecond current. There are two current sources that produce two offsetcurrents respectively at said first and third points in the apparatus,an output lead being connected to the third point to carry an outputcurrent equal to the first current. The two offset currents can betrimmed to cause the output current to be zero when the differencebetween the two voltages is zero. The operational amplifiers drawnegligible current, as does the circuit element. The first current isgenerated by an operational amplifier with one input connected toreceive one of the voltages. A resistor is connected between the othervoltage and a second input of the operational amplifier, and the MOSFETtransistor has its source connected to the second input, its drainconnected to the second point, and its gate connected to an output ofthe operational amplifier.

A high common mode rejection ratio is achieved. The circuit isrelatively insensitive to temperature shifting or time shiftingcomponent values. The input voltages can have a relatively high value,e.g., 60 volts or higher. Each input voltage can have either polarity.Any offset in the output current can be trimmed away.

Other features and advantages will become apparent from the followingdescription of the preferred embodiment, and from the claims.

BRIEF DESCRIPTION OF THE DRAWING

FIG. 1 is a differential voltage measurement circuit.

DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring to FIG. 1, circuit 10 receives at points 12, 14 two inputvoltages (V_(in) +, V_(in) -) and delivers at an output 16 a current(I_(out)) whose value represents the magnitude of the difference betweenthe two input voltages. Each of the input voltages V_(in) +, V_(in) -may be of either polarity and V_(in) + may be either larger or smallerthan V_(in) -. Circuit 10 includes a voltage-to-current converter 18which is connected to point 14, to point 12 via a resistor R1, and (viaan output lead 20) to a current mirror 22. The output lead 24 of mirror22 is connected via resistor R9 to output 16. Circuit 10 also includestwo identical current sources 26, 28 which are connected respectivelyvia leads 30, 32 to converter 18 and mirror 22.

In converter 18, an operational amplifier A1 has its + (non-inverting)and - (inverting) inputs connected respectively via resistors R1 and R2to points 12, 14. The + input of amplifier A1 is also connected toground via a variable capacitor C1 and the - input is also connected toground via a capacitor C2. The output of amplifier A1 is connected tothe gate of a high-voltage MOSFET transistor Q1. The source oftransistor Q1 is connected by a feedback path to the - input ofamplifier A1 and is also connected via lead 30 to current source 26.

In mirror 22, an operational amplifier A3 has its + input connected vialead 20 to the drain of transistor Q1, and via a resistor R3 to a +72volts supply. The - (inverting) input of amplifier A3 is connected via aresistor R8 (which has the same resistance as R3) to the +72 voltssupply, and is also connected (by a feedback path) to the source of ahigh-voltage MOSFET transistor Q3. The source of transistor Q3 isconnected via a resistor R9 to output 16. The output of amplifier A3 isconnected to the gate of transistor Q3.

In current sources 26, 28, MOSFET transistors Q2, Q4 have their gatesfed by operational amplifiers A2A, A2B, and have their drains connectedto leads 30, 32, and their sources connected via resistors R4, R11 to-72 volts, and via feedback back paths to the - (inverting) inputs ofamplifiers A2A, A2B. The feedback paths are also connected via trimmingresistors TR1, TR2 to -72 volts.

Amplifiers A2A, A2B, and A3 are powered by means of two Zener diodesCR1, CR2, and a resistor R7 connected in series between the +72 voltsand the -72 volts. Zener diode CR2 powers amplifiers A2A and A2B, and bymeans of a voltage divider R5, R6 biases the + inputs of the twoamplifiers. Zener diode CR1 powers amplifier A3. The Zener diodearrangement is required because amplifiers A2A, A2B, and A3 must operateon signals close to the +72 and -72 supply voltages.

Amplifier A1 is powered by floating voltages +FL and -FL. Voltages +FLand -FL are provided by circuitry (not shown) which causes them to havevalues which are respectively about 12 volts above and below the voltage33 (e.g., in the range of +60 volts to -60 volts) that is delivered viaa precision input resistor R_(in) to a load. The current to or from theload is the current of interest and R_(in) converts that current intovoltages at points 12, 14, that have a voltage differential of less than1 volt. Amplifier A1 considers 0 volts common mode to be at the midpointbetween its supply voltages, which is equal to voltage 33 andapproximately the same as the common mode of the voltages V_(in) + andV_(in) -. Thus changes in the common mode of V_(in) + and V_(in) - areeffectively not seen by amplifier A1 and amplifier A1 is operated atvery nearly a zero common mode voltage, thus reducing any adverse effectof large common mode input voltages or large swings in common mode inputvoltages.

The components in converter 18 and mirror 22 are chosen for precisionperformance. Operational amplifiers A1 and A3 have FET inputs which drawnegligibly small bias currents in this application. The gate currents ofthe transistors Q1, Q3 are negligibly small so that their respectivesource currents are closely repeated in their drain currents.

Current sources 26, 28 generate currents I1A, I1B at the drains oftransistors Q2, Q4; these two current sources allow circuit operationwith bipolar voltages V_(in) +, V_(in) -. The nominal values of currentsI1A, I1B are determined by voltage divider R5, R6. Trimmers TR1 and TR2are included so that the values of I1A and I1B can be trimmed so as tozero the output current (I_(out)) whenever the differential betweenV_(in) + and V_(in) - is zero. Matching of the values of I1A and I1Bdoes not affect the common mode rejection ratio of the circuit.Amplifiers A2A, A2B are two halves of a dual monolithic integratedcircuit which provides reasonably good matching of their characteristicswith changing temperature.

The circuit components have the following values and identifyingnumbers:

R1--27K ohms, 5%

R2--2K ohms, 0.01%

R3, R8, R4, R11--4K ohms, 0.01%

R5--31.6K ohms, 1%

R6--10K ohms, 1%

R7--two 68K ohm, 5% 1/4 watt resistors in parallel

R9, R10--20K ohms, 1%

C1--2.5-10 pF variable in series with 10 pF fixed

C2--100 pF

Q1, Q2, Q4--VN0530N3 n-channel MOSFET (Supertex, Inc.)

Q3--VP0530N3 p-channel MOSFET (Supertex, Inc.)

A1, A3--LF441A

A2A, A2B--LM358A (dual amplifier)

CR1, CR2--lN968B, 20-volt Zener diode

Operation

The feedback around A1 forces its - input to the same voltage as its +input and as a result the voltage differential [(V_(in) +)-(V_(in) -)]across resistor R2 is converted to a current proportional to the voltagedifferential: ##EQU1## Because the input of A1 draws negligible currenti₂ =i₁ at a first point 40. Also i₄ =i₂ +I1A, and because transistor Q1draws negligible gate current, i₃ =i₄ =i₁ +I1A. Because negligiblecurrent is drawn by the + input of amplifier A3, all of i₃ flows throughR3 causing a voltage drop of i₃ R3. Feedback around A3 causes thevoltage at the lower end of R8 to equal the voltage at the lower end ofR3. Since R3=R8, the equal voltage drops cause equal currents to flow inR3 and R8, i.e., i₅ =i₃ that is i₅ mirrors i₃ and i₅ =i₃ =i₁ +I1A.Because the gate current of transistor Q3 is negligibly small, i₆ =i₅=i₁ +I1A. The output current, I_(out) =i₆ -I1B=i₁ +I1A-I1B. Since I1A isadjusted to be equal to I1B, ##EQU2## as desired. The true effect of thenegligible amplifier input and transistor gate currents is only to causea small offset in I_(out) which can be eliminated by adjusting TR1 orTR2. R1, R2, C2 minimize the circuit's response to AC common modesignals. The two R-C networks R1-C1, R2-C2 are used to balance (byadjusting C1) the time delays of the AC common mode signals to reach thetwo inputs of amplifier A1, thus preventing the AC common mode signalsfrom producing a spurious voltage differential across R2.

The DC common mode rejection ratio of the circuit is approximately 125to 140 dB, which is achieved without circuit adjustments or trims or anykind.

As a specific example of certain voltage relationships, if V_(in) +=60volts, and V_(in) -=59 volts, then one volt appears across R2, and i₁=1/2milliamp. The bias voltage at the + input of amplifer A2A is set tocause I1A =1.18 milliamps. Thus i₄ =0.5+1.18=1.68 milliamps and i₃ =1.68milliamps and the voltage across R3 is 6.72 volts. Likewise the voltagedrop across R4 is 4.72 volts. Since the source of Q1 is at 60 volts, thedrop across Q1 is 5.28 volts and across Q2 is 127.28. Thus, most of thecommon mode voltage appears across a high impedance current source sothat the size of the common mode voltage and swings in the common modevoltage do not affect the current being measured. Depending on therelative values of V_(in) + and V_(in) - and their polarities, most ofthe common mode voltage may appear across Q1, also a high-impedancedevice whose drain current is not affected by common mode voltageswings. Thus i₃ is representative of i₁ regardless of the magnitude orchanges in magnitude of the common mode voltages dropped across Q1 orQ2.

Other embodiments are within the following claims.

The relatively low impedance input V_(in) - (equal to R2, 2000 ohms) canbe converted to a high input impedance by driving the input V_(in) -from an operational amplifier voltage follower of standard design. Theinput to the follower would be the new high-impedance inverting inputfor the overall circuit. In that case the follower amplifier must bepowered from the floating supplies ±FL, to preserve the high common moderejection ratio.

By placing a 1000 ohm resistor in series with the gate leads of thetransistors, trouble shooting becomes easier because the non-zerovoltage across one of the resistors would indicate gate current flowinginto a bad transistor. In normal operation, the resistors have no effectsince the gate currents are negligible.

The common mode input voltages for which the circuit is useful can beincreased from about 60 volts (the limiting factor being the breakdownvoltage of the transistors) by increasing the fixed supplies from ±72 tonearly ±200 volts, scaling the resistor values to control dissipation,and using capacitors of adequate breakdown voltage. The fixed suppliescould also be reduced below ±72 volts.

The extremely high output impedance would permit I_(out) to beaccurately converted to a voltage by connection to ground through aresistor (R_(L)) for a gain of R_(L) /R₂, or by use of a standardoperational amplifier current-to-voltage converter circuit.

When amplifier A1 is an LF441A, improved dynamic performance can beattained by connecting its pin 1 to its pin 5.

We claim:
 1. Apparatus for measuring for difference between two voltagesand rejecting common mode signals comprisingmeans for generating at afirst point in said apparatus a first current proportional to saiddifference at a voltage related to the common mode voltage of said twovoltages, a circuit path between a high voltage source and a low voltagesource,said path including a node that is connected to said first pointand between said high voltage source and said low voltage source, saidtwo voltages being between the voltages of said high and low voltagesources, a circuit element along said circuit path between said node andone of said high and low voltage sources, said circuit element beingconnected to said means so as to produce a second current through itthat is indicative of said voltage difference and is independent of thevoltage across it,said second current also flowing through a secondpoint on said cirucit path between said node and said one voltagesource, a portion of said common mode voltage appearing across saidcircuit element, a first offset current source along said circuit pathbetween said node and the other of said high and low voltagesources,said offset current source providing an offset current from saidnode, permitting said first current to be of either polarity, and acurrent mirror connected to said second point for providing at a thirdpoint in said apparatus a current identical to said second current,whereby the magnitude of said second current can be determined withoutaffecting its value by sensing said third current.
 2. The apparatus ofclaim 1 wherein said means for generating said first current comprisesan operational amplifier connected in a feedback mode, and saidoperational amplifier is powered in a zero common mode configurationrelative to one of said two voltages via floating voltage sources. 3.The apparatus of claim 2 wherein said operational amplifier has inputswhich draw negligible current.
 4. The apparatus of claim 1 wherein saidcircuit element comprises a transistor connected between said first andsecond points.
 5. The apparatus of claim 4 wherein said transistorcomprises a high voltage MOSFET transistor with its source and drainrespectively connected to said first and second points.
 6. The apparatusof claim 1 wherein said first offset current source comprises a secondcircuit element connected to said node and having an output currentindependent of the voltage across said second circuit element, andwherein at least a portion of said common mode voltage is caused toappear across said second element.
 7. The apparatus of claim 1 furthercomprising a second offset current source for producing a second offsetcurrent identical to said first offset current at said in saidapparatus, and an output lead connected to said third point to carry anoutput current equal to said first current.
 8. The apparatus of claim 7wherein said first and second offset current sources include means fortrimming said offset currents to cause said output current to be zerowhen said difference between said two voltages is zero.
 9. The apparatusof claim 1 wherein said circuit element draws negligible current for itsoperation.
 10. The apparatus of claim 1 wherein said generating meanscomprisesan operational amplifier having inverting and noninvertinginputs, said noninverting input being connected to receive one saidvoltage, a resistor connected between the other said voltage and theinverting input of said operational amplifier, and wherein said circuitelement comprises a MOSFET transistor whose source is connected to saidinverting input, drain is connected to said second point, and gate isconnected to an output of said operational amplifier.